Systematic Verification of AHB Protocol Using Assertion and Randomized UVM Approach

K.Reshma Nair; B.Lakshmi Narayanan

doi:https://doi.org/10.47001/JAIET/2025.211004

Authors

K.Reshma Nair

Electronics and Communication Engineering Department, IES College of Engineering, Thrissur-Kerala, India

B.Lakshmi Narayanan

Electronics and Communication Engineering Department, IES College of Engineering, Thrissur-Kerala, India

Abstract

Advanced verification of on-chip communication protocols is critical to ensure the reliability and performance of modern digital systems. This research presents a systematic approach for verifying the Advanced High-performance Bus (AHB) protocol using a combination of assertion-based verification and constrained randomized techniques within the Universal Verification Methodology (UVM) framework. Assertions are employed to capture protocol-specific properties and monitor adherence to timing and functional constraints, while randomized test generation ensures thorough exploration of corner cases that might be missed by directed tests. The verification environment includes a UVM testbench with stimulus generators, monitors, scoreboards, and functional coverage metrics to provide comprehensive validation. Simulation results demonstrate that the proposed approach effectively detects protocol violations and ensures full functional coverage, reducing verification time and effort compared to traditional methods. The study highlights the advantages of integrating assertion-based checks with randomized testing in a structured UVM environment, providing a robust methodology for protocol verification in complex SoC designs.

Keywords

Advanced High-performance Bus (AHB); AMBA Protocol; Universal Verification Methodology (UVM); SystemVerilog; Functional Verification

Citation of this Article

K.Reshma Nair, & B.Lakshmi Narayananv. (2025). Systematic Verification of AHB Protocol Using Assertion and Randomized UVM Approach. Journal of Artificial Intelligence and Emerging Technologies (JAIET). 2(11), 22-27. Article DOI: https://doi.org/10.47001/JAIET/2025.211004

References

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[1] P.Harishankar, Mr. Chosen Duari Mr.Ajay Sharma, “Design and Synthesis of Efficient FSM for Master and Slave Interface in AMBA AHB”, International Journal of Engineering Development and Research”, IJEDR, Volume 2, Issue 3, ISSN: 2321-9939, 2014.

[2] Shivakumar B.R Deeksha L, “Efficient Design and Implementation of AMBA AHB Bus Protocol using Verilog”, International Conference on Intelligent Sustainable System, (ICISS) in IEEE, 2019.

[3] Mr. M. Naresh Kumar, K.Manikanta Sai Kishore “Design and Implementation of Efficient FSM for AHB Master and Arbiter”, International Journal and magazines of Engineering Technology, Management and Research ISSN No. 2348-4845, 2015.

[4] ARM Ltd., AMBA 3 AHB-Lite Protocol Specification, ARM IHI 0033A, 2010.

[5] Bergeron, J., Writing Testbenches Using SystemVerilog, Springer, 2003.

[6] Spear, C., SystemVerilog for Verification, Springer, 2012.

[7] Foster, H., Assertion-Based Design, Springer, 2004.

[8] Bhasker, J., SystemVerilog HDL, Star Galaxy Publishing, 2004.

[9] Jain, R., Gupta, V., & Sharma, P., “UVM Based Verification of AMBA Bus,” IJERT, 2016.

[10] Kumar, S., & Mishra, R., “Constrained Random Verification of AMBA Protocol,” IJETT, 2018.

[11] Love, R., Linux Kernel Development, Addison-Wesley, 2010.

[12] Peryer, D., & Pressman, J., Advanced Verification Techniques, Wiley, 2011.

[13] Sutherland, S., Davidmann, S., & Flake, P., SystemVerilog for Design, Springer, 2004.

[14] IEEE Standard 1800-2017, SystemVerilog Language Reference Manual, IEEE, 2017.

[15] Accellera Systems Initiative, Universal Verification Methodology (UVM) 1.2 User Guide, 2015.

[16] Keating, M., Flynn, D., Aitken, R., Gibbons, A., & Shi, K., Low Power Methodology Manual, Springer, 2007.

[17] Cummings, C., “Simulation and Synthesis Techniques for Asynchronous FIFO Design,” SNUG Conference, 2002.

[18] Perry, D., VHDL and SystemVerilog for Engineers, McGraw-Hill, 2010.

[19] Smith, M., Application-Specific Integrated Circuits, Addison-Wesley, 1997.

[20] Shraddha divekar, Archana Tiwari “Multichannel AMBA AHB with Multiple Arbitration Technique”, International Conference on Signal Processing and Communication, Apr 3-5, 2014.

[21] ayapraveen and T.G. Priya “Design of Memory Controller based on AMBA AHB protocol”, “Elixir International Journal 51A, Vol.2, pp. 11115-11119, 2012.